Vivek Kumar - Conference Publications
(Electronics & Communication Engineering)
Conference Publications
Year Author(s) Title Conference name with place Indexing (SCI)
2024 J. Patel, Vivek Kumar, N. Bagga, S. Dasgupta Small Signal Analysis of Nanosheet Transistor for sub-THz Frequency Considering Intersheet Capacitances and Modified Admittance Parameters 82nd Device Research Conference The University of Maryland, College Park SCI
2024 Jyoti Patel, Ankit Dixit, Naveen Kumar, Navjeet Bagga, Bathula Satwik, Ishani Bais, Chirag Arora, Vivek Kumar,Vihar Georgiev, S Dasgupta Machine Learning Augmented TCAD Assessment of Corner Radii in Nanosheet FET 10th Joint EuroSOI Workshop and International Conference on Ultimate Integration on Silicon (EuroSOI-ULIS 2024), 15-17 May 2024, Glyfada, Attica, Greece SCI
2024 J. Patel, S. Rai, Vivek Kumar, and S. Dasgupta Interface Trap Analysis in Multi-Fin FinFET Technology: a Crucial Reliability Issue in Digital Application IEEE International Symposium on Circuits & Systems, to be held in Singapore SCI
2024 Deepak Kumar Sharma, Arjun Datta, Jatinder Pal Singh, Kanishk K, Rohan Srivastava, Gourab Das, Jyoti Kedia, Sanjeev Kumar, Vivek Kumar and Arun Kumar Singh Understanding Trap-Induced Barrier Height Fluctuations in Nickel-Silicon Contacts for Advanced Semiconductor Technology 8th IEEE Electron Devices Technology and Manufacturing (IEEE EDTM) , Hotel Hiton Bengaluru (Accepted) SCI
2024 Vivek Kumar, Nischal Anand, Rohit Rai, Sneha Chauhan and Jyoti Patel Unveiling Thermal Cross Talk in 5nm Gate-All-Around Stacked Nanosheet FETs: A Machine Learning Perspective 37th International Conference on VLSI Design, ITC Kolkata SCI
2023 Aditya Kumar Singh, Vivek Kumar, Jyoti Patel and Sudeb Dasgupta Analysis and Modeling of Self Heating and Substrate Induced Transitions in 5 nm Stacked Nanosheet FET 27th International Symposium on VLSI Design and Test (VDAT-2023), BITs Pilani SCI
2023 Jyoti Patel, Govind Sharma, Chitraja Rajan, Vivek Kumar and Sudeb Dasgupta Power Efficient Hardware Fingerprint: Exploiting Process-Variations in A Quasi-Planar 14nm FinFET 19th IEEE APCCAS 2023, Hyderabad SCI
2023 Nischal Anand, Rohit Rai, Yashvi Verma, Amit Singh Chauhan, Deepak Kumar Sharma, Vivek Kumar TCAD-Based Analysis of Nanosheet and Forksheet FET Electrical Characteristics in the Presence of Gamma and Heavy Ion Radiation 11th International Conference on ESDC, Jointly Organized by IIIT Sri City and London Digital Twin Research Centre (UK) SCI
2023 Vivek Kumar, Arnab Datta and Sudeb Dasgupta Ab initio Multiscale Thermal Modeling of 5 nm Stacked Nanosheet Field Effect Transistor for thermal hotspot Optimization inside the channel (Accepted) 22nd ITherm-2023 at Orlando, FL, USA SCI
2023 Vivek Kumar, Jyoti Patel, Arnab Datta and Sudeb Dasgupta FEM modeling of gate resistance for 5 nm SGC/DGC Stacked Nanosheet Transistor (Accepted) 36th International Conference on VLSI Design, Hyderabad SCI
2023 Vibhu V, Sparsh Mittal and Vivek Kumar A Machine Learning-based model for Single Event Upset Current Prediction in 14nm FinFETs (Accepted) 36th International Conference on VLSI Design, Hyderabad SCI
2022 Vivek Kumar, J. Patel, A. Datta, and S. Dasgupta FEM Modeling of Thermal Aspect of Dielectric Inserted Under Source & Drain of 5nm Nanosheet 26th International Symposium on VLSI Design and Test (VDAT-2022), Indian Institute of Technology, Jammu (IIT Jammu),2022 SCI
2022 P. Bharti, H. Muthusamy, and Vivek Kumar Thermal Resistance Extraction of 14 nm SOI FinFET:A Machine Learning Based Approach 2nd IEEE International Conference on Emerging Frontiers in Electrical and Electronic Technologies, NIT Patna SCI
2021 Vivek Kumar, N. Chauhan, A. Datta, and S. Dasgupta Optimization of Negative Differential Conductance (NDC) Point for Multi Gate Devices Considering Self Heating Effects using Surface to Volume Ratio (SVR) 21st International Workshop on Physics of Semiconductor Devices (IWPSD), IIT - Delhi & SSPL - Delhi SCI